loader, quantize: align GGUF on llama.cpp, conv kernels widened to F16 at load
GGUF norm matches llama.cpp policy: F32 master stays F32, BF16 variant keeps source BF16, K-quants fall back to F16 when kernel rows do not align. No conv override in pick_type. Conv kernels widen to F16 at load through gf_load_conv (12 sites). qwen_load_ctw_f32 accepts BF16 source. TODO upstream GGML: ggml_conv_1d and ggml_conv_1d_dw force F16 on their im2col output, while conv_2d picks the kernel dtype. This crashes F32 and BF16 kernels on CPU (im2col only handles F16) and BF16 on Vulkan (mul_mat refuses BF16 on the operand the kernel ends up on). Aligning conv_1d on conv_2d removes the workaround.
This commit is contained in:
Pascal
+11
-6
@@ -36,12 +36,14 @@ static struct ggml_tensor * qwen_load_ctw_f32(WeightCtx * wctx, const GGUFModel
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fprintf(stderr, "[CausalTransConv] FATAL: tensor '%s' not found\n", name.c_str());
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exit(1);
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}
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// Source dtype is F32 in the F32 master, F16 in the quantized variants
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// since 3D conv weights cannot be Q8_0 / Q4_K_M and ggml falls back to
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// F16 in the quantizer. Both paths cast to F32 here ; the K*OC*IC
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// Source dtype follows the GGUF norm (pure llama.cpp policy). The F32
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// master keeps tensors in F32, the BF16 variant keeps them in their
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// source BF16, and the K-quant variants land them in F16 through the
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// aligned fallback (kernel rows of width K=2 do not divide a K-quant
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// block size). All three are widened to F32 here ; the K*OC*IC
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// permutation always lands in a freshly allocated F32 buffer anyway.
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if (src->type != GGML_TYPE_F32 && src->type != GGML_TYPE_F16) {
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fprintf(stderr, "[CausalTransConv] FATAL: '%s' expected F32 or F16, got type %d\n", name.c_str(),
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if (src->type != GGML_TYPE_F32 && src->type != GGML_TYPE_F16 && src->type != GGML_TYPE_BF16) {
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fprintf(stderr, "[CausalTransConv] FATAL: '%s' expected F32, F16 or BF16, got type %d\n", name.c_str(),
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(int) src->type);
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exit(1);
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}
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@@ -60,7 +62,10 @@ static struct ggml_tensor * qwen_load_ctw_f32(WeightCtx * wctx, const GGUFModel
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if (src->type == GGML_TYPE_F32) {
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return ((const float *) raw)[idx];
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}
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return ggml_fp16_to_fp32(((const ggml_fp16_t *) raw)[idx]);
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if (src->type == GGML_TYPE_F16) {
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return ggml_fp16_to_fp32(((const ggml_fp16_t *) raw)[idx]);
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}
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return ggml_bf16_to_fp32(((const ggml_bf16_t *) raw)[idx]);
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};
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for (int ic = 0; ic < IC; ic++) {
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@@ -77,7 +77,7 @@ static bool qwen_upsample_stage_load(QwenUpsampleStage * stage, const GGUFModel
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QwenConvNeXtBlock & cn = stage->convnext[i];
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snprintf(name, sizeof(name), "tok_dec.upsample.%d.dwconv.weight", i);
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cn.dwconv_w = gf_load_tensor(&wctx, gf, name);
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cn.dwconv_w = gf_load_conv(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_dec.upsample.%d.dwconv.bias", i);
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cn.dwconv_b = gf_load_tensor(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_dec.upsample.%d.norm.weight", i);
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@@ -150,7 +150,7 @@ static bool qwen_dac_decoder_load(QwenDACDecoder * d, const GGUFModel & gf, ggml
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WeightCtx wctx;
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wctx_init(&wctx, n_tensors);
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d->conv_pre_w = gf_load_tensor(&wctx, gf, "tok_dec.dec.0.conv.weight");
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d->conv_pre_w = gf_load_conv(&wctx, gf, "tok_dec.dec.0.conv.weight");
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d->conv_pre_b = gf_load_tensor(&wctx, gf, "tok_dec.dec.0.conv.bias");
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for (int i = 0; i < QWEN_DAC_NUM_BLOCKS; i++) {
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@@ -182,17 +182,17 @@ static bool qwen_dac_decoder_load(QwenDACDecoder * d, const GGUFModel & gf, ggml
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qwen_dac_load_snakebeta(&wctx, gf, &ru.act1, std::string(rp) + ".act1.alpha",
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std::string(rp) + ".act1.beta");
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ru.c1w = gf_load_tensor(&wctx, gf, std::string(rp) + ".conv1.weight");
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ru.c1w = gf_load_conv(&wctx, gf, std::string(rp) + ".conv1.weight");
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ru.c1b = gf_load_tensor(&wctx, gf, std::string(rp) + ".conv1.bias");
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qwen_dac_load_snakebeta(&wctx, gf, &ru.act2, std::string(rp) + ".act2.alpha",
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std::string(rp) + ".act2.beta");
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ru.c2w = gf_load_tensor(&wctx, gf, std::string(rp) + ".conv2.weight");
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ru.c2w = gf_load_conv(&wctx, gf, std::string(rp) + ".conv2.weight");
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ru.c2b = gf_load_tensor(&wctx, gf, std::string(rp) + ".conv2.bias");
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}
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}
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qwen_dac_load_snakebeta(&wctx, gf, &d->snake_post, "tok_dec.dec.5.snake.alpha", "tok_dec.dec.5.snake.beta");
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d->conv_post_w = gf_load_tensor(&wctx, gf, "tok_dec.dec.6.conv.weight");
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d->conv_post_w = gf_load_conv(&wctx, gf, "tok_dec.dec.6.conv.weight");
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d->conv_post_b = gf_load_tensor(&wctx, gf, "tok_dec.dec.6.conv.bias");
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if (!wctx_alloc(&wctx, backend)) {
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@@ -30,7 +30,7 @@ static bool qwen_encoder_downsample_load(QwenEncoderDownsample * d, const GGUFMo
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WeightCtx wctx;
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wctx_init(&wctx, 4);
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d->weight = gf_load_tensor(&wctx, gf, "tok_enc.downsample.weight");
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d->weight = gf_load_conv(&wctx, gf, "tok_enc.downsample.weight");
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if (!wctx_alloc(&wctx, backend)) {
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fprintf(stderr, "[EncDownsample] FATAL: backend allocation failed\n");
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return false;
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+85
-47
@@ -266,6 +266,91 @@ static struct ggml_tensor * gf_load_tensor_f32(WeightCtx * wctx, const GGUFModel
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return tensor;
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}
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// Load a Conv1d / Conv1dDW kernel weight, forcing F16 storage on the
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// backend regardless of the source GGUF dtype.
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//
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// TODO upstream GGML : ggml_conv_1d and ggml_conv_1d_dw in
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// ggml/src/ggml.c hardcode dst_type = GGML_TYPE_F16 in their internal
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// ggml_im2col call (currently ggml.c lines around 4508 and 4542).
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// ggml_conv_2d at the equivalent site uses the adaptive pattern
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// dst_type = a->type (around line 4595). Two backend bugs follow.
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//
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// 1) CPU im2col dispatches on dst->type. The im2col_f16 path
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// asserts src0->type == GGML_TYPE_F16, so a F32 or BF16 conv
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// kernel crashes on CPU.
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// 2) ggml_conv_1d lowers to ggml_mul_mat(im2col, reshape(weight))
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// where the weight ends up as src1, not src0. The Vulkan fast
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// path ggml_vk_get_dequantize_mul_mat_vec asserts b_type in
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// {F32, F16, Q8_1}, so a BF16 conv kernel crashes on Vulkan
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// even when im2col itself succeeds.
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//
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// Vulkan does ship a pipeline_im2col_f32 and CUDA handles both F32
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// and F16 cleanly, so the fix upstream is to align ggml_conv_1d and
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// ggml_conv_1d_dw on ggml_conv_2d's adaptive a->type pattern. Until
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// that lands, the only safe assumption across CPU, CUDA, and Vulkan
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// is F16 kernels everywhere, so we mirror ggml_conv_1d's hardcoded
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// choice here and load every conv kernel as F16 regardless of source
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// dtype. F16 source is a direct passthrough, F32 and BF16 widen
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// through a F32 staging buffer.
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static struct ggml_tensor * gf_load_conv(WeightCtx * wctx, const GGUFModel & gf, const std::string & name) {
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int64_t idx = gguf_find_tensor(gf.gguf, name.c_str());
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if (idx < 0) {
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fprintf(stderr, "[GGUF] FATAL: tensor '%s' not found\n", name.c_str());
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exit(1);
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}
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struct ggml_tensor * src = ggml_get_tensor(gf.meta, name.c_str());
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int n_dims = ggml_n_dims(src);
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int64_t ne[4] = { 1, 1, 1, 1 };
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for (int i = 0; i < n_dims; i++) {
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ne[i] = src->ne[i];
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}
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// F16 source : direct passthrough, no conversion.
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if (src->type == GGML_TYPE_F16) {
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return gf_load_tensor(wctx, gf, name);
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}
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if (src->type != GGML_TYPE_F32 && src->type != GGML_TYPE_BF16) {
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fprintf(stderr, "[GGUF] FATAL: gf_load_conv unsupported source type %s for '%s'\n", ggml_type_name(src->type),
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name.c_str());
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exit(1);
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}
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// Allocate F16 backend tensor in the WeightCtx graph.
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struct ggml_tensor * tensor = ggml_new_tensor(wctx->ctx, GGML_TYPE_F16, n_dims, ne);
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ggml_set_name(tensor, name.c_str());
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size_t n = (size_t) ggml_nelements(src);
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size_t raw_off = gguf_get_tensor_offset(gf.gguf, idx);
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const void * raw = gf.mapping + gf.data_offset + raw_off;
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// The staging vector owns float[] buffers to keep memory alive
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// until wctx_alloc copies it to the backend. n F16 elements
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// occupy n * 2 bytes, which fits in (n + 1) / 2 floats. The
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// pending entry references the same buffer reinterpreted as
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// ggml_fp16_t and carries the exact F16 byte count.
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size_t n_floats = (n + 1) / 2;
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auto buf = std::make_unique<float[]>(n_floats);
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ggml_fp16_t * data = (ggml_fp16_t *) buf.get();
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if (src->type == GGML_TYPE_F32) {
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ggml_fp32_to_fp16_row((const float *) raw, data, (int) n);
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} else {
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// BF16 source : widen to F32 first, then narrow to F16 in
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// one pass to preserve mantissa bits the BF16-to-F16 direct
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// cast would otherwise leave undefined.
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std::vector<float> f32(n);
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const uint16_t * p = (const uint16_t *) raw;
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for (size_t i = 0; i < n; i++) {
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f32[i] = ggml_bf16_to_fp32(*(const ggml_bf16_t *) &p[i]);
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}
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ggml_fp32_to_fp16_row(f32.data(), data, (int) n);
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}
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wctx->pending.push_back({ tensor, (const void *) data, n * sizeof(ggml_fp16_t), 0 });
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wctx->staging.push_back(std::move(buf));
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return tensor;
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}
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// Get raw pointer to tensor data in the mmapped file.
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// Useful for CPU-side operations (e.g. bf16 embed lookup for lyrics).
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// Returns NULL if not found.
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@@ -290,53 +375,6 @@ static enum ggml_type gf_get_type(const GGUFModel & gf, const std::string & name
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return src->type;
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}
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// Load a Conv1d weight onto an F16 backend tensor regardless of the source
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// dtype. Mandatory on ARM aarch64 : the CPU im2col op asserts src0 is F16,
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// while x86 silently accepts BF16 / F32. F16 source memcpy passes through ;
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// F32 / BF16 widen ; Q8_0 / Q4_K / Q5_K / Q6_K dequantize via type traits.
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// The destination tensor must be allocated as GGML_TYPE_F16.
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static void gf_load_conv_f16(struct ggml_tensor * dst, const GGUFModel & gf, const std::string & name) {
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struct ggml_tensor * src = ggml_get_tensor(gf.meta, name.c_str());
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if (!src) {
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fprintf(stderr, "[GGUF] FATAL: tensor '%s' not in meta context\n", name.c_str());
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exit(1);
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}
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GGML_ASSERT(dst->type == GGML_TYPE_F16);
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GGML_ASSERT(ggml_nelements(dst) == ggml_nelements(src));
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const void * raw = gf_get_data(gf, name.c_str());
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size_t n = (size_t) ggml_nelements(src);
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// F16 source : direct memcpy, no conversion needed.
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if (src->type == GGML_TYPE_F16) {
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ggml_backend_tensor_set(dst, raw, 0, ggml_nbytes(dst));
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return;
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}
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// All other types widen / dequantize to F32, then cast down to F16.
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std::vector<float> f32(n);
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if (src->type == GGML_TYPE_F32) {
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memcpy(f32.data(), raw, n * sizeof(float));
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} else if (src->type == GGML_TYPE_BF16) {
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const uint16_t * p = (const uint16_t *) raw;
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for (size_t i = 0; i < n; i++) {
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f32[i] = ggml_bf16_to_fp32(*(const ggml_bf16_t *) &p[i]);
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}
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} else {
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const struct ggml_type_traits * tr = ggml_get_type_traits(src->type);
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if (!tr || !tr->to_float) {
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fprintf(stderr, "[GGUF] FATAL: unsupported conv weight type %s for '%s'\n", ggml_type_name(src->type),
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name.c_str());
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exit(1);
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}
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tr->to_float(raw, f32.data(), (int64_t) n);
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}
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std::vector<ggml_fp16_t> f16(n);
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ggml_fp32_to_fp16_row(f32.data(), f16.data(), (int) n);
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ggml_backend_tensor_set(dst, f16.data(), 0, n * sizeof(ggml_fp16_t));
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}
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// Fuse Q, K, V projection weights into a single tensor [ne0, q_ne1 + k_ne1 + v_ne1].
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// Works for any quantized type since quantization is per-row (along ne[0]).
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// The fused tensor data is q rows || k rows || v rows (contiguous).
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@@ -57,7 +57,7 @@ bool pipeline_codec_load(PipelineCodec * pc, const char * gguf_path, BackendPair
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{
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WeightCtx wctx;
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wctx_init(&wctx, 4);
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pc->pre_conv_w = gf_load_tensor(&wctx, pc->gguf, "tok_dec.pre_conv.weight");
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pc->pre_conv_w = gf_load_conv(&wctx, pc->gguf, "tok_dec.pre_conv.weight");
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pc->pre_conv_b = gf_load_tensor(&wctx, pc->gguf, "tok_dec.pre_conv.bias");
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if (!wctx_alloc(&wctx, pc->backend)) {
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qt_log(QT_LOG_ERROR, "[Pipeline] pre_conv backend allocation failed");
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@@ -107,7 +107,7 @@ static bool qwen_seanet_encoder_load(QwenSEANetEncoder * s, const GGUFModel & gf
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WeightCtx wctx;
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wctx_init(&wctx, n_tensors);
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s->init_w = gf_load_tensor(&wctx, gf, "tok_enc.conv.0.weight");
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s->init_w = gf_load_conv(&wctx, gf, "tok_enc.conv.0.weight");
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s->init_b = gf_load_tensor(&wctx, gf, "tok_enc.conv.0.bias");
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// Stage indexing follows the Python ModuleList layout :
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@@ -125,23 +125,23 @@ static bool qwen_seanet_encoder_load(QwenSEANetEncoder * s, const GGUFModel & gf
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char name[80];
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snprintf(name, sizeof(name), "tok_enc.res.%d.blk.1.weight", RES_PY_IDX[i]);
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stg.resnet.c0_w = gf_load_tensor(&wctx, gf, name);
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stg.resnet.c0_w = gf_load_conv(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_enc.res.%d.blk.1.bias", RES_PY_IDX[i]);
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stg.resnet.c0_b = gf_load_tensor(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_enc.res.%d.blk.3.weight", RES_PY_IDX[i]);
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stg.resnet.c1_w = gf_load_tensor(&wctx, gf, name);
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stg.resnet.c1_w = gf_load_conv(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_enc.res.%d.blk.3.bias", RES_PY_IDX[i]);
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stg.resnet.c1_b = gf_load_tensor(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_enc.conv.%d.weight", DOWN_PY_IDX[i]);
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stg.down_w = gf_load_tensor(&wctx, gf, name);
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stg.down_w = gf_load_conv(&wctx, gf, name);
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snprintf(name, sizeof(name), "tok_enc.conv.%d.bias", DOWN_PY_IDX[i]);
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stg.down_b = gf_load_tensor(&wctx, gf, name);
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dim = stg.out_ch;
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}
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s->last_w = gf_load_tensor(&wctx, gf, "tok_enc.conv.14.weight");
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s->last_w = gf_load_conv(&wctx, gf, "tok_enc.conv.14.weight");
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s->last_b = gf_load_tensor(&wctx, gf, "tok_enc.conv.14.bias");
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if (!wctx_alloc(&wctx, backend)) {
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+5
-4
@@ -106,8 +106,9 @@ static bool is_embed(const char * name) {
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// false here keep their source dtype (F32) regardless of the requested
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// type. Conv weights pass through the main loop and fall back to F16 when
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// the row width does not divide the variant block size (kernel K=7,3,1,...).
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// gf_load_conv_f16 then memcpys F16 source straight to the F16 backend
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// tensor (ARM im2col strict requirement, see src/gguf-weights.h).
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// gf_load_conv then loads every conv kernel as F16 on the backend
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// regardless of the source GGUF dtype, see the TODO upstream block above
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// the function definition in src/gguf-weights.h.
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//
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// Sensitive tensors that MUST stay in full precision :
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// tok_enc.vq_*.{i}.codebook RVQ codebook tables, encoder side
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@@ -374,8 +375,8 @@ int main(int argc, char ** argv) {
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// Conv kernels (K=7,3,1,...) cannot fit a block-quant row : fall back
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// to F16. F16 has no block size, 10-bit mantissa beats BF16 (7) and
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// Q* effective on these weights, and gf_load_conv_f16 memcpys F16
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// source straight to the F16 backend tensor at load time.
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// Q* effective on these weights, and gf_load_conv on the C++ side
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// loads every conv kernel as F16 regardless of source dtype.
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if (can_convert && !aligned) {
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target = GGML_TYPE_F16;
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aligned = true;
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